1. Field of the Invention
The invention generally relates to semiconductor fabrication methods. More specifically, the invention relates to: 1) a method for enhancing the flatness, i.e.; the planarity of a warped or bowed semiconductor wafer using oxide deposition techniques to increase semiconductor wafer and die yields, and, 2) a bonded semiconductor wafer assembly made from the method.
2. Prior Art
Industry-standard semiconductor wafers and in particular, GaN-on-sapphire semiconductor wafers, substrates or templates, are common in photonic applications but often have surface non-planarity. The undesirable non-planarity of a semiconductor wafer can be characterized by warp and/or bowing. Typical warp and/or bow measurements on semiconductor wafers are affected by measurement method and edge exclusion region definition. The smaller the edge exclusion region, the higher the measured warp and/or bow. Semiconductor wafer warp and/or bow are also affected by the diameter of the semiconductor wafer and by the thicknesses of the underlying substrate and grown epitaxial layers on standard semiconductor wafers. Semiconductor wafer warp may be on the order of 100 μm or greater across the surface of a 4-in. substrate and such non-planarity is an impediment in many semiconductor processes.
Undesirable non-planar semiconductor wafer profiles are generally convex and it is important to minimize or eliminate such non-planarity to improve processing yields in later fabrication steps. In standard applications, warp in a substrate is desirably reduced to at least less than 80 μm across a 4-in. semiconductor wafer and greater reductions of warp/bow further improve semiconductor wafer bonding properties in subsequent processing steps.
The warp of a 4-in. photonic semiconductor wafer should be less than 80 μm to be accepted by a typical photolithographic stepper, such as a Canon stepper for example, in terms of mechanical handling (e.g.; vacuum arm and chuck), which in turn improves the local planar focus. Commonly, semiconductor wafer bow negatively affects vacuum arm pick up of the semiconductor wafer (from a cassette for example) and excessive semiconductor wafer warp negatively affects the suction of the semiconductor wafer onto the chuck. It is desired that any residual bow remains convex on the first semiconductor wafer surface rather than concave for improved subsequent processing of the semiconductor wafer.
An inexpensive process for reducing non-planarity and improving semiconductor wafer shape profile of the aforementioned semiconductor wafers is needed to improve yields in subsequent semiconductor wafer processing steps.